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For Programmers, Multicore Chips Mean Multiple Challenges
September 2007 (vol. 40 no. 9)
pp. 17-19
| ASCII Text | x | ||
| David Geer, "For Programmers, Multicore Chips Mean Multiple Challenges," Computer, vol. 40, no. 9, pp. 17-19, September, 2007. | |||
| BibTex | x | ||
| @article{ 10.1109/MC.2007.311, author = {David Geer}, title = {For Programmers, Multicore Chips Mean Multiple Challenges}, journal ={Computer}, volume = {40}, number = {9}, issn = {0018-9162}, year = {2007}, pages = {17-19}, doi = {http://doi.ieeecomputersociety.org/10.1109/MC.2007.311}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - Computer TI - For Programmers, Multicore Chips Mean Multiple Challenges IS - 9 SN - 0018-9162 SP17 EP19 EPD - 17-19 A1 - David Geer, PY - 2007 KW - multicore chips VL - 40 JA - Computer ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MC.2007.311
Because they are unable to continue to effectively improve microprocessor performance by shrinking transistors and packing more of them onto single-core chips, vendors are building multicore chips that handle various parts of an application in parallel, an alternative approach that presents many challenges.
Index Terms:
multicore chips
Citation:
David Geer, "For Programmers, Multicore Chips Mean Multiple Challenges," Computer, vol. 40, no. 9, pp. 17-19, Sept. 2007, doi:10.1109/MC.2007.311
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