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| Rakesh Kumar, Dean M. Tullsen, Norman P. Jouppi, Parthasarathy Ranganathan, "Heterogeneous Chip Multiprocessors," Computer, vol. 38, no. 11, pp. 32-38, November, 2005. | |||
| BibTex | x | ||
| @article{ 10.1109/MC.2005.379, author = {Rakesh Kumar and Dean M. Tullsen and Norman P. Jouppi and Parthasarathy Ranganathan}, title = {Heterogeneous Chip Multiprocessors}, journal ={Computer}, volume = {38}, number = {11}, issn = {0018-9162}, year = {2005}, pages = {32-38}, doi = {http://doi.ieeecomputersociety.org/10.1109/MC.2005.379}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - Computer TI - Heterogeneous Chip Multiprocessors IS - 11 SN - 0018-9162 SP32 EP38 EPD - 32-38 A1 - Rakesh Kumar, A1 - Dean M. Tullsen, A1 - Norman P. Jouppi, A1 - Parthasarathy Ranganathan, PY - 2005 KW - Multiprocessors KW - Multicore microprocessors KW - Chip multiprocessors KW - CMP KW - Power-aware computing KW - System architectures KW - Heterogeneity VL - 38 JA - Computer ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MC.2005.379
Heterogeneous (or asymmetric) chip multiprocessors present unique opportunities for improving system throughput, reducing processor power, and mitigating Amdahl's law. On-chip heterogeneity allows the processor to better match execution resources to each application's needs and to address a wider spectrum of system loads-from low to high thread parallelism-with high efficiency.
Index Terms:
Multiprocessors, Multicore microprocessors, Chip multiprocessors, CMP, Power-aware computing, System architectures, Heterogeneity
Citation:
Rakesh Kumar, Dean M. Tullsen, Norman P. Jouppi, Parthasarathy Ranganathan, "Heterogeneous Chip Multiprocessors," Computer, vol. 38, no. 11, pp. 32-38, Nov. 2005, doi:10.1109/MC.2005.379
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