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| Yervant Zorian, "Nanoscale Design & Test Challenges," Computer, vol. 38, no. 2, pp. 36-39, February, 2005. | |||
| BibTex | x | ||
| @article{ 10.1109/MC.2005.67, author = {Yervant Zorian}, title = {Nanoscale Design & Test Challenges}, journal ={Computer}, volume = {38}, number = {2}, issn = {0018-9162}, year = {2005}, pages = {36-39}, doi = {http://doi.ieeecomputersociety.org/10.1109/MC.2005.67}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - Computer TI - Nanoscale Design & Test Challenges IS - 2 SN - 0018-9162 SP36 EP39 EPD - 36-39 A1 - Yervant Zorian, PY - 2005 KW - design and test KW - nanotechnology KW - design automation VL - 38 JA - Computer ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MC.2005.67
The silicon-scaling revolution presents a plethora of challenges as technology progresses into the nanoscale era. To meet these challenges, the design and test community has banded together to improve design automation and find solutions that will optimize performance at every level.
Index Terms:
design and test, nanotechnology, design automation
Citation:
Yervant Zorian, "Nanoscale Design & Test Challenges," Computer, vol. 38, no. 2, pp. 36-39, Feb. 2005, doi:10.1109/MC.2005.67
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