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| Ujval J. Kapasi, Scott Rixner, William J. Dally, Brucek Khailany, Jung Ho Ahn, Peter Mattson, John D. Owens, "Programmable Stream Processors," Computer, vol. 36, no. 8, pp. 54-62, August, 2003. | |||
| BibTex | x | ||
| @article{ 10.1109/MC.2003.1220582, author = {Ujval J. Kapasi and Scott Rixner and William J. Dally and Brucek Khailany and Jung Ho Ahn and Peter Mattson and John D. Owens}, title = {Programmable Stream Processors}, journal ={Computer}, volume = {36}, number = {8}, issn = {0018-9162}, year = {2003}, pages = {54-62}, doi = {http://doi.ieeecomputersociety.org/10.1109/MC.2003.1220582}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - Computer TI - Programmable Stream Processors IS - 8 SN - 0018-9162 SP54 EP62 EPD - 54-62 A1 - Ujval J. Kapasi, A1 - Scott Rixner, A1 - William J. Dally, A1 - Brucek Khailany, A1 - Jung Ho Ahn, A1 - Peter Mattson, A1 - John D. Owens, PY - 2003 VL - 36 JA - Computer ER - | |||
The demand for flexibility in media processing motivates the use of programmable processors. However, very large-scale integration constraints limit the performance of traditional programmable architectures. In modern VLSI technology, computation is relatively cheap?thousands of arithmetic logic units operating at multigigahertz rates can fit on a modestly sized 1 square centimeter die. Yet delivering instructions and data to those ALUs is prohibitively expensive.
The Imagine media processor validates the hypothesis that careful management of bandwidth and parallelism, from the programming language to the hardware, results in both high performance and high performance per unit of power.
Citation:
Ujval J. Kapasi, Scott Rixner, William J. Dally, Brucek Khailany, Jung Ho Ahn, Peter Mattson, John D. Owens, "Programmable Stream Processors," Computer, vol. 36, no. 8, pp. 54-62, Aug. 2003, doi:10.1109/MC.2003.1220582
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