This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Programmable Stream Processors
August 2003 (vol. 36 no. 8)
pp. 54-62
Ujval J. Kapasi, Stanford University
Scott Rixner, Rice University
William J. Dally, Stanford University
Brucek Khailany, Stanford University
Jung Ho Ahn, Stanford University
Peter Mattson, Reservoir Labs
John D. Owens, University of California, Davis

The demand for flexibility in media processing motivates the use of programmable processors. However, very large-scale integration constraints limit the performance of traditional programmable architectures. In modern VLSI technology, computation is relatively cheap?thousands of arithmetic logic units operating at multigigahertz rates can fit on a modestly sized 1 square centimeter die. Yet delivering instructions and data to those ALUs is prohibitively expensive.

The Imagine media processor validates the hypothesis that careful management of bandwidth and parallelism, from the programming language to the hardware, results in both high performance and high performance per unit of power.

Citation:
Ujval J. Kapasi, Scott Rixner, William J. Dally, Brucek Khailany, Jung Ho Ahn, Peter Mattson, John D. Owens, "Programmable Stream Processors," Computer, vol. 36, no. 8, pp. 54-62, Aug. 2003, doi:10.1109/MC.2003.1220582
Usage of this product signifies your acceptance of the Terms of Use.