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A Practical Architecture for Reliable Quantum Computers
January 2002 (vol. 35 no. 1)
pp. 79-87

Quantum computers offer the prospect of computation that scales exponentially with data size. Unfortunately, a single bit error can corrupt an exponential amount of data. Quantum mechanics can seem more suited to science fiction than system engineering, yet small quantum devices of 5 to 7 bits have been built in the laboratory, 100-bit devices are on the drawing table now, and emerging quantum technologies promise even greater scalability. Empirical studies of practical quantum architectures are just beginning to appear in the literature. Elementary architectural concepts are still lacking: How do we provide quantum storage, data paths, classical control circuits, parallelism, and system integration? And, crucially, how can we design architectures to reduce error-correction overhead? The authors describe a proposed architecture that uses code teleportation, quantum memory refresh units, dynamic compilation of quantum programs, and scalable error correction to achieve system- level efficiencies. They assert that their work indicates the underlying technology's reliability is crucial; practical architectures will require quantum technologies with error rates between 10 ?6 and 10 ?9 .

Citation:
Mark Oskin, Frederic T. Chong, Isaac L. Chuang, "A Practical Architecture for Reliable Quantum Computers," Computer, vol. 35, no. 1, pp. 79-87, Jan. 2002, doi:10.1109/2.976922
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