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PipeRench: A Reconfigurable Architecture and Compiler
April 2000 (vol. 33 no. 4)
pp. 70-77

With the proliferation of highly specialized embedded computer systems has come a diversification of workloads for computing devices. General-purpose processors are struggling to efficiently meet these applications' disparate needs, and custom hardware is rarely feasible. According to the authors, reconfigurable computing, which combines the flexibility of general-purpose processors with the efficiency of custom hardware, can provide the alternative.

PipeRench and its associated compiler comprise the authors' new architecture for reconfigurable computing. Combined with a traditional digital signal processor, microcontroller, or general-purpose processor, PipeRench can support a system's various computing needs without requiring custom hardware.

The authors describe the PipeRench architecture and how it solves some of the preexisting problems with FPGA architectures, such as logic granularity, configuration time, forward compatibility, hard constraints, and compilation time.

Citation:
Seth Copen Goldstein, Herman Schmit, Mihai Budiu, Srihari Cadambi, Matt Moe, R. Reed Taylor, "PipeRench: A Reconfigurable Architecture and Compiler," Computer, vol. 33, no. 4, pp. 70-77, April 2000, doi:10.1109/2.839324
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