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| Marco Platzner, "Reconfigurable Accelerators for Combinatorial Problems," Computer, vol. 33, no. 4, pp. 58-60, April, 2000. | |||
| BibTex | x | ||
| @article{ 10.1109/2.839322, author = {Marco Platzner}, title = {Reconfigurable Accelerators for Combinatorial Problems}, journal ={Computer}, volume = {33}, number = {4}, issn = {0018-9162}, year = {2000}, pages = {58-60}, doi = {http://doi.ieeecomputersociety.org/10.1109/2.839322}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - Computer TI - Reconfigurable Accelerators for Combinatorial Problems IS - 4 SN - 0018-9162 SP58 EP60 EPD - 58-60 A1 - Marco Platzner, PY - 2000 VL - 33 JA - Computer ER - | |||
Reconfigurable accelerators can improve process time on combinatorial problems with fine-grained parallelism. Such problems contain a huge number of logical operations (NOT, AND, and OR) that can evaluate simultaneously, a characteristic that varies considerably from problem to problem. Because of this variability, such combinatorial problems are approached using instance-specific reconfiguration--hardware tailored to a specific algorithm and a specific set of input data.
Boolean satisfiability (SAT for short) is a common combinatorial problem that exhibits fine-grained parallelism. SAT varies considerably based on the situation. Its solution is thus an ideal candidate for improvements based on instance-specific reconfiguration. In fact, simulations of an instance-specific accelerator show potential speed-ups by a factor of up to 140,000 in execution time over the solution by a software solver. The authors detail the results of their prototype that leads to an order of magnitude speedup in the execution of difficult satisfiability problems.

