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Maximizing multiprocessor performance with the SUIF compiler
December 1996 (vol. 29 no. 12)
pp. 84,85,86,87,88,89
| ASCII Text | x | ||
| E. Bugnion, Shih-Wei Liao, B.R. Murphy, S.P. Amarasinghe, J.M. Anderson, M.W. Hall, M.S Lam, "Maximizing multiprocessor performance with the SUIF compiler," Computer, vol. 29, no. 12, pp. 84,85,86,87,88,89, December, 1996. | |||
| BibTex | x | ||
| @article{ 10.1109/2.546613, author = {E. Bugnion and Shih-Wei Liao and B.R. Murphy and S.P. Amarasinghe and J.M. Anderson and M.W. Hall and M.S Lam}, title = {Maximizing multiprocessor performance with the SUIF compiler}, journal ={Computer}, volume = {29}, number = {12}, issn = {0018-9162}, year = {1996}, pages = {84,85,86,87,88,89}, doi = {http://doi.ieeecomputersociety.org/10.1109/2.546613}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - Computer TI - Maximizing multiprocessor performance with the SUIF compiler IS - 12 SN - 0018-9162 SP EP EPD - 84,85,86,87,88,89 A1 - E. Bugnion, A1 - Shih-Wei Liao, A1 - B.R. Murphy, A1 - S.P. Amarasinghe, A1 - J.M. Anderson, A1 - M.W. Hall, A1 - M.S Lam, PY - 1996 KW - mathematics computing KW - parallelising compilers KW - multiprocessing systems KW - performance evaluation KW - optimising compilers KW - benchmark programs KW - multiprocessor performance KW - SUIF compiler KW - automatic parallelization techniques KW - Stanford University Intermediate Format compiler KW - array-based numerical programs KW - parallelizing compilers KW - memory optimization techniques KW - robust analysis techniques KW - speedups KW - NAS KW - SPECfp95 KW - Parallel processing KW - Phased arrays KW - Program processors KW - Information analysis KW - Concurrent computing KW - Privatization KW - Throughput KW - Multiprocessing systems KW - Cache memory KW - Programming profession VL - 29 JA - Computer ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/2.546613
This article describes automatic parallelization techniques in the SUIF (Stanford University Intermediate Format) compiler that result in good multiprocessor performance for array-based numerical programs. Parallelizing compilers for multiprocessors face many hurdles. However, SUIF's robust analysis and memory optimization techniques enabled speedups on three fourths of the NAS and SPECfp95 benchmark programs.
Index Terms:
mathematics computing,parallelising compilers,multiprocessing systems,performance evaluation,optimising compilers,benchmark programs,multiprocessor performance,SUIF compiler,automatic parallelization techniques,Stanford University Intermediate Format compiler,array-based numerical programs,parallelizing compilers,memory optimization techniques,robust analysis techniques,speedups,NAS,SPECfp95,Parallel processing,Phased arrays,Program processors,Information analysis,Concurrent computing,Privatization,Throughput,Multiprocessing systems,Cache memory,Programming profession
Citation:
E. Bugnion, Shih-Wei Liao, B.R. Murphy, S.P. Amarasinghe, J.M. Anderson, M.W. Hall, M.S Lam, "Maximizing multiprocessor performance with the SUIF compiler," Computer, vol. 29, no. 12, pp. 84,85,86,87,88,89, Dec. 1996, doi:10.1109/2.546613
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