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Interrupt Processing in Concurrent Processors
June 1995 (vol. 28 no. 6)
pp. 36-46
ASCII Text
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Wade Walker, Harvey G. Cragon, "Interrupt Processing in Concurrent Processors," Computer, vol. 28, no. 6, pp. 36-46, June, 1995.
 
 
BibTex
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@article{ 10.1109/2.386984,
author = {Wade Walker and Harvey G. Cragon},
title = {Interrupt Processing in Concurrent Processors},
journal ={Computer},
volume = {28},
number = {6},
issn = {0018-9162},
year = {1995},
pages = {36-46},
doi = {http://doi.ieeecomputersociety.org/10.1109/2.386984},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - Computer
TI - Interrupt Processing in Concurrent Processors
IS - 6
SN - 0018-9162
SP36
EP46
EPD - 36-46
A1 - Wade Walker,
A1 - Harvey G. Cragon,
PY - 1995
KW - Interrupt processing
KW - precise interrupts
KW - imprecise interrupts
KW - concurrent processors
KW - taxonomy
KW - checkpointing
KW - out- of-order execution
KW - out-of-order issue
KW - pipelined processors
KW - superscalar processors
VL - 28
JA - Computer
ER -
 
This paper presents a taxonomy of interrupt processing strategies for concurrent processors. Such a taxonomy helps processor designers systematically explore possible interrupt processing system implementations. It also provides a framework to which new information about interrupt processing can easily be added. This paper also discusses other issues which relate to interrupt processing, such as preciseness, interrupt nesting, and interrupt- specific hardware.
Index Terms:
Interrupt processing, precise interrupts, imprecise interrupts, concurrent processors, taxonomy, checkpointing, out- of-order execution, out-of-order issue, pipelined processors, superscalar processors
Citation:
Wade Walker, Harvey G. Cragon, "Interrupt Processing in Concurrent Processors," Computer, vol. 28, no. 6, pp. 36-46, June 1995, doi:10.1109/2.386984
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