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Fault Tolerance in VLSI Circuits
July 1990 (vol. 23 no. 7)
pp. 73-83

The defects that can occur when manufacturing VLSI ICs and the faults that can result are described. Some commonly used restructuring techniques for avoiding defective components are discussed. Several defect-tolerant designs of memory ICs, logic ICs, and wafer-scale circuits are presented. Yield models for predicting the yield of chips with redundancy are introduced, and the optimal amount of redundancy is determined.

Citation:
Israel Koren, Adit D. Singh, "Fault Tolerance in VLSI Circuits," Computer, vol. 23, no. 7, pp. 73-83, July 1990, doi:10.1109/2.56854
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