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Off Line, Built-in Test Techniques for VLSI Circuits
June 1982 (vol. 15 no. 6)
pp. 69-82
M.G. Buehler, Jet Propulsion Laboratory, California Institute of Technology
Citation:
M.G. Buehler, M.W. Sievers, "Off Line, Built-in Test Techniques for VLSI Circuits," Computer, vol. 15, no. 6, pp. 69-82, June 1982, doi:10.1109/MC.1982.1654052
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