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Off Line, Built-in Test Techniques for VLSI Circuits
June 1982 (vol. 15 no. 6)
pp. 69-82
| ASCII Text | x | ||
| M.G. Buehler, M.W. Sievers, "Off Line, Built-in Test Techniques for VLSI Circuits," Computer, vol. 15, no. 6, pp. 69-82, June, 1982. | |||
| BibTex | x | ||
| @article{ 10.1109/MC.1982.1654052, author = {M.G. Buehler and M.W. Sievers}, title = {Off Line, Built-in Test Techniques for VLSI Circuits}, journal ={Computer}, volume = {15}, number = {6}, issn = {0018-9162}, year = {1982}, pages = {69-82}, doi = {http://doi.ieeecomputersociety.org/10.1109/MC.1982.1654052}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - Computer TI - Off Line, Built-in Test Techniques for VLSI Circuits IS - 6 SN - 0018-9162 SP69 EP82 EPD - 69-82 A1 - M.G. Buehler, A1 - M.W. Sievers, PY - 1982 KW - null VL - 15 JA - Computer ER - | |||
Citation:
M.G. Buehler, M.W. Sievers, "Off Line, Built-in Test Techniques for VLSI Circuits," Computer, vol. 15, no. 6, pp. 69-82, June 1982, doi:10.1109/MC.1982.1654052
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