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W.J. Kaminsky, University of Illinois
Multiprocessing within a chip may be the next step in the evolution of single-chip microprocessors. The methodology described here achieves multiple-instruction-stream concurrency with a shared-resource pipeline architecture.
Citation:
W.J. Kaminsky, E.S. Davidson, "Special Feature: Developing a Multiple-Instructon-Stream Single-Chip Processor," Computer, vol. 12, no. 12, pp. 66-76, Dec. 1979, doi:10.1109/MC.1979.1658578
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