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October 1979 (vol. 12 no. 10)
pp. 9-21
VLSI has brought exciting increases in circuit density and performance capability. But it has also aggravated the problem of chip, component and system testing. Here are some approaches to dealing with that problem.
Citation:
T.W. Williams, K.P. Parker, "Testing Logic Networks and Designing for Testability," Computer, vol. 12, no. 10, pp. 9-21, Oct. 1979, doi:10.1109/MC.1979.1658490
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