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June 1976 (vol. 9 no. 6)
pp. 47-63
| ASCII Text | x | ||
| R.G. Bennetts, R.V. Scott, "Recent Developments in the Theory and Practice of Testable Logic Design*," Computer, vol. 9, no. 6, pp. 47-63, June, 1976. | |||
| BibTex | x | ||
| @article{ 10.1109/C-M.1976.218613, author = {R.G. Bennetts and R.V. Scott}, title = {Recent Developments in the Theory and Practice of Testable Logic Design*}, journal ={Computer}, volume = {9}, number = {6}, issn = {0018-9162}, year = {1976}, pages = {47-63}, doi = {http://doi.ieeecomputersociety.org/10.1109/C-M.1976.218613}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - Computer TI - Recent Developments in the Theory and Practice of Testable Logic Design* IS - 6 SN - 0018-9162 SP47 EP63 EPD - 47-63 A1 - R.G. Bennetts, A1 - R.V. Scott, PY - 1976 KW - null VL - 9 JA - Computer ER - | |||
This paper surveys and summarizes the major contributions to the theory and practice of testable logic design. The first part, dealing with the theoretical procedures, discusses the design of easily testable combinational, sequential, and iterative networks, illustrating major techniques with common running examples. The second part comments on the more practical aspects such as board layout, test point siting, and other facilities for easing the problems associated with testing.
Citation:
R.G. Bennetts, R.V. Scott, "Recent Developments in the Theory and Practice of Testable Logic Design*," Computer, vol. 9, no. 6, pp. 47-63, June 1976, doi:10.1109/C-M.1976.218613
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