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Issue No.04 - April (1974 vol.7)
pp: 39-44
T. Baker , GTE Laboratories Inc.
ABSTRACT
Test patterns for testing digital circuits are usually checked on a test verification program to determine if all or most of the possible faults will be detected. Historically, such a test verification program would be accomplished with many simulations: one for each possible fault.
CITATION
T. Baker, "Concurrent simulation of nearly identical digital networks", Computer, vol.7, no. 4, pp. 39-44, April 1974, doi:10.1109/MC.1974.6323496
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