This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
A multiminiprocessor system implemented through pipelining
Feb. 1974 (vol. 7 no. 2)
pp. 42-51
Leonard E. Shar, Hewlett-Packard Company
Edward S. Davidson, University of Illinois
Several recent and proposed computer systems have employed parallel and pipelined architectures to increase instruction execution rate, or throughput. These vary from the giant ILLIAC IV1 with its large number of processing elements constrained to perform nearly identical computations in unison (single instruction stream-multiple data stream9) to the Carnegie-Mellon C. mmp system2 employing a number of independent minicomputers with shared memory (multiple instruction stream-multiple data stream). On the other hand, pipelining has been used in numerous' large computers, such as the Control Data 6600, 7600, and STAR, the IBM System 360/91 and 360/195, and the Texas Instruments ASC, to improve throughput. These systems generally employ single instruction stream-single data stream processing, although some machines in this category also have “vector” instructions that operate on multiple data streams.
Citation:
Leonard E. Shar, Edward S. Davidson, "A multiminiprocessor system implemented through pipelining," Computer, vol. 7, no. 2, pp. 42-51, Feb. 1974, doi:10.1109/MC.1974.6323457
Usage of this product signifies your acceptance of the Terms of Use.