This Article 
 Bibliographic References 
 Add to: 
A Processor Architecture for 3D Graphics
September/October 1992 (vol. 12 no. 5)
pp. 96-105

The DLX/3DCP architecture that uses a method of parallel processing on 3-D vectors to overcome the problem of the large number of floating-point operations required in 3-D graphics which limits the performance of graphics systems is described. The architecture's design offers general-purpose programmability from the high-level object-oriented language C++ and generates performance expected only from dedicated special-purpose hardware. Results that show the architecture's performance on graphics operations are presented and compared to the performance of other RISC processors.

1. J. Grimes, "The Intel i860 64-bit Processor: A General-Purpose CPU with 3D Graphics Capabilities,"IEEE CG&A, Vol. 9, No. 4, July 1989, pp. 85-94.
2. J.H. Clark, "The Geometry Engine: A VLSI Geometry System for Graphics,"Computer Graphics (Proc. Siggraph), Vol. 16, No. 3, July 1982, pp. 127-133.
3. B. Apgar et al., "A Display System for the Stellar Graphics Supercomputer Model GS1000,"Computer Graphics(Proc. Siggraph), Vol. 22, No. 4, Aug. 1988, pp. 255-262.
4. J.L. Hennessy and David A. Patterson,Computer Architecture: A Quantitative Approach, Morgan Kaufmann, San Mateo, Calif., 1990.
5. Y. Wang et al., "The 3DP: A Processor Architecture for 3D Applications ,"Computer, Vol. 25, No. 1, January 1992, pp. 25-36.
6. Y. Wang and P. Srinivasan, "A Three-Dimensional Vector CoProcessor," patent pending.
7. G. Kane,MIPS RISC Architecture, Prentice-Hall, Englewood Cliffs, N.J., 1988.
8. D. W. Ruck, S. K. Rogers, M. Kabrinsky, M. E. Oxley, and B. W. Sutter, "The multilayer perceptron as an approximation to a Bayes optimal discriminant function,"IEEE Trans. Neural Networks, vol. 1, no. 4, pp. 296-298, Dec. 1990.
9. M.D. Tiemann, "User's Guide to Gnu C++," Free Software Foundation, Boston, 1988.
10. B. Stroustrup,The C++ Programming Language. Reading, MA: Addison-Wesley, 1986.

Yulun Wang, Amante Mangaser, Partha Srinivasan, "A Processor Architecture for 3D Graphics," IEEE Computer Graphics and Applications, vol. 12, no. 5, pp. 96-105, Sept.-Oct. 1992, doi:10.1109/38.156019
Usage of this product signifies your acceptance of the Terms of Use.