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Multiprocessor Raster Plotting
July/August 1992 (vol. 12 no. 4)
pp. 79-87

A scalable multiprocessor raster image processor that generates printed circuit plots in alternating band buffers is described. Synchronous raster plotting systems and the development of mask creation for producing printed circuits are reviewed. The general architecture of the multiprocessing system that rasterizes printed circuit plot descriptions, and its graphics, load prediction, and facet size computation operations are discussed. Performance analysis results of two versions of the multiprocessor architecture, one with four rasterization transputers and the other with eight, are presented.

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Citation:
Roger D. Hersch, Pierre Demartines, Doris G. Fridman, Jean-Marc Aberle, Peter Pisan, Andre Decurnex, Ralf Rogner, "Multiprocessor Raster Plotting," IEEE Computer Graphics and Applications, vol. 12, no. 4, pp. 79-87, July-Aug. 1992, doi:10.1109/38.144830
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