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Issue No.01 - Jan.-March (2013 vol.35)
pp: 48-55
Jay W. Lathrop , Clemson University
ABSTRACT
From 1952 to 1958, Jay Lathrop worked on a project at the National Bureau of Standards (later the US Army Diamond Ordnance Fuze Laboratory) to develop microminiaturized, transistorized hybrid integrated circuits for radio proximity fuzes. In this article, Lathrop describes his experiences during this project, the development of photolithography, and how photolithography became critical in the first efforts to produce semiconductor ICs.
INDEX TERMS
Transistors, US Department of Defense, History, NIST, Diamond-like carbon, Lithography, Electron tubes, National Bureau of Standards, photolithography, history of computing, integrated circuit, printed circuits, microcircuitry, National Bureau of Standards, US Army Diamond Ordnance Fuze Laboratory, proximity fuze
CITATION
Jay W. Lathrop, "The Diamond Ordnance Fuze Laboratory's Photolithographic Approach to Microcircuits", IEEE Annals of the History of Computing, vol.35, no. 1, pp. 48-55, Jan.-March 2013, doi:10.1109/MAHC.2011.83
REFERENCES
1. L. Brown, "The Proximity Fuze," IEEE AES Systems Magazine, July 1993, pp. 3–10; J.W. Lyons, E.A. Brown, and B. Fonoroff, "Radio Proximity Fuzes," NIST Special Publication 958, http://nvl.nist.gov/pub/nistpubs/sp958-lide cntsp958.htm; R.B. Baldwin, The Deadly Fuze: The Secret Weapon of World War II, Presidio Press, 1980.
2. "James R. Nall," Notes on Contributors, Proc. IRE, vol. 47, no. 5, 1959, p. 1013.
3. R.A. Williams, "Diffused Base Surface-Barrier Transistors," and R.M. Warner, G.T. Loman, and J.M. Early, "Characteristics of a Diffused-Base Germanium Oscillator Transistor," 1956 Electron Devices Meeting, vol. 2, 1956, p. 12. See also C. Thronton, and J. Angell, "Technology of Micro-Alloy Diffused Transistors," Proc. IRE, vol. 46, no. 6, 1958, pp. 1166–1176 and R. Warner, J. Early, and G. Loman, "Characteristics, Structure, and Performance of a Diffused-Base Germanium Oscillator Transistor," IRE Trans. Electron Devices, vol. 5, no. 3, 1958, pp. 127–130.
4. J.R. Nall and J.W. Lathrop, "Photolithographic Fabrication Techniques for Transistors which Are an Integral Part of a Printed Circuit," IEEE Trans. Electron Devices, vol. 5, no. 2, 1958, p. 117.
5. J.W. Lathrop et al., "Semiconductor Construction," US patent 2,890,395, Patent and Trademark Office, filed 31 Oct. 1957, issued 9 June 1959.
6. In reality, this was a "parallel plane" approach because we could use both sides of the ceramic plate. T.A. Prugh, J.R. Nall, and N.J. Doctor, "The DOFL Microelectronics Program," Proc. IRE, vol. 47, May 1959, pp. 882–894.
7. Independently, Jules Andrus and William Bond were also pursuing photoetching approaches to fabricate transistors at Bell Labs. J. Andrus, "Fabrication of Semiconductor Devices," US patent 3,122,817, Patent and Trademark Office, filed 15 Aug. 1957, issued 3 Mar. 1964. J. Andrus, and W. Bond, "Photoengraving in Transistor Fabrication," Transistor Technology, vol. III, F.J. Biondi, et al., eds., Van Nostrand, 1958, pp. 151–162.
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