The Community for Technology Leaders
RSS Icon
Subscribe
Issue No.01 - Jan.-March (2012 vol.34)
pp: 20-36
David A. Laws , Computer History Museum
Michael Riordan , Stanford University and University of California, Santa Cruz
ABSTRACT
<p>The modern integrated circuit evolved from developments at Fairchild Semiconductor during the late 1950s and early 1960s. Using information from laboratory notebooks, internal company memoranda, oral histories, and personal communications, this article reconstructs and analyzes the activities of the Fairchild development team, including the company's efforts to improve and market ICs during the early 1960s.</p>
INDEX TERMS
history of computing, Fairchild, Noyce, Hoerni, Last, Hass, Kattner, Norman, Moore, Micrologic, planar, integrated circuit
CITATION
David A. Laws, Michael Riordan, "Making Micrologic: The Development of the Planar IC at Fairchild Semiconductor, 1957–1963", IEEE Annals of the History of Computing, vol.34, no. 1, pp. 20-36, Jan.-March 2012, doi:10.1109/MAHC.2011.87
REFERENCES
1. J.A. Morton, "Report on Transistor Development," July 1949, AT&T Archives.
2. M. Riordan and L. Hoddeson, Crystal Fire: The Birth of the Information Age, W.W. Norton, 1997, esp. pp. 121–141.
3. In fact, Morton's 1949 speculations corresponded fairly closely to what eventually became the Bell Labs (and Western Electric) hybrid, thin-film approach to ICs in the 1950s—the beam-lead, sealed-junction technique, which flowered in the mid-1960s but died out thereafter, as MOS microcircuits won out over other alternatives. See the Oct./Nov. 1966 special issue of Bell Labs Record on ICs, especially W.C. Hittinger and M. Sparks, "Integrated Circuits," and M.P. Lepsetter, "Beam-Lead Sealed Junction Technology."
4. See articles on contemporaneous work on microcircuitry underway at RCA, TI, Westinghouse, and other companies published in this issue of the Annals. See also the 10 March 1961 Life photo essay, "In Tiny Devices, A Revolution," for photos of the microelectronic devices.
5. For a perceptive comparison of printing and semiconductor technologies, and their tremendous impacts on culture and society, see J.T. Last, "Two Communications Revolutions," Proc. IEEE, vol. 86, no. 1, 1998, pp. 170–175.
6. C. Lécuyer Making Silicon Valley: Innovation and the Growth of High Tech, 1930–1970, MIT Press, 2006, pp. 129–139; C. Lécuyer, and D.C. Brock, Makers of the Microchip: A Documentary History of Fairchild Semiconductor, MIT Press, 2010, pp. 9–17; D.A. Laws, "A Company of Legend: The Legacy of Fairchild Semiconductor," IEEE Annals of the History of Computing, vol. 32, no. 1, 2010, pp. 60–74.
7. R.N. Noyce interview by M.F. Wolff IEEE History Center, Rutgers Univ., 19 Sept. 1975.
8. Riordan, and Hoddeson, Crystal Fire, pp. 104, 107–110, 117, 236–240.
9. G. Moore interview by M. Riordan 2006. See also G. Moore, "The Role of Fairchild in Silicon Technology in the Early Days of Silicon Valley," Proc. IEEE, vol. 86, no. 1, 1998, pp. 53–62, where he wrote that , "Hoerni, our theoretician, sat at his desk and thought" (p. 56). Lécuyer, however, disagrees with Moore's characterization of Hoerni, with good substantiation, as Hoerni demonstrated his laboratory acumen in developing the planar transistor; C. Lécuyer, private conversations with M. Riordan.
10. J. Hoerni Fairchild Semiconductor lab notebook, 1 Dec. 1957, pp. 3–4, copied in Lécuyer and Brock, Makers of the Microchip, pp. 60–61.
11. Lécuyer and Brock, Makers of the Microchip, pp. 17–22.
12. Lécuyer and Brock, Makers of the Microchip, pp. 27–30; Moore, "The Role of Fairchild."
13. M. Riordan, "The Silicon Dioxide Solution," IEEE Spectrum, vol. 44, no. 12, 2007, pp. 50–56; Moore, interview by Riordan, Lécuyer, and Brock, Makers of the Microchip, pp. 29–30.
14. Riordan, "The Silicon-Dioxide Solution," p. 53; Lécuyer and Brock, Makers of the Microchip, p. 30; Moore, interview by Riordan.
15. J. Last interview by M. Riordan21 Dec. 2004.
16. J. Hoerni, "Method of Protecting Exposed p-n Junctions at the Surface of Silicon Transistors by Oxide Masking Techniques," 14 January 1959; typescript copied in Lécuyer and Brock, Makers of the Microchip, pp. 142–143.
17. Hoerni lab notebook pages copied from the personal collection of J. Last.
18. Riordan, "The Silicon Dioxide Solution," p. 54; Lécuyer and Brock, Makers of the Microchip, p. 31. There are substantial differences of opinion over what actually occurred in this demonstration. Last and Moore did not specifically recall Hoerni spitting on the device, although this was recorded in Lécuyer and Brock's account and by other observers present (such as Harry Sello). As Moore points out, saliva on unprotected metallic leads would have shorted them out, and the transistor should then have stopped working. Last and Moore, interviews by Riordan.
19. Morton quoted by T.R. Reid, The Chip: How Two Americans Invented the Microchip and Launched a Revolution, Simon & Schuster, 1984, p. 18.
20. On Morton and the tyranny of numbers, see Riordan and Hoddeson, Crystal Fire, pp. 254–256; and M. Riordan, "How Bell Labs Missed the Microchip," IEEE Spectrum, vol. 43, no. 12, 2006, pp. 36–41.
21. Reid, The Chip, p. 76.
22. Lécuyer and Brock, Makers of the Microchip, note 108, p. 282–283.
23. R. Noyce Fairchild Semiconductor lab notebook, 23 Jan. 1959, pp. 70–74, copied in Lécuyer and Brock, Makers of the Microchip, pp. 151–155.
24. Jay Last, Fairchild Semiconductor lab notebook, 18 Mar. 1959, pp. 139–141, copied in Lécuyer and Brock, Makers of the Microchip, pp. 162–167.
25. J.A. Hoerni, "Method of Manufacturing Semiconductor Devices," US patent 3,025,589, Patent and Trademark Office, filed 1 May 1959, awarded 20 Mar. 1962. It is noteworthy that the drawings of a planar transistor on the first page of this patent show how the collector can be added from the top side of the wafer, through the oxide layer, in contrast with the approach used in Hoerni's first prototype devices, in which the collector was applied from its back side. In the illustrated approach, all processing activities can occur from a single side of the wafer (as in a printing process).
26. Riordan, "The Silicon Dioxide Solution," p. 54; Lécuyer and Brock, Makers of the Microchip, p. 32.
27. Noyce interview by Wolff.
28. R.N. Noyce, "Semiconductor Device and Lead Structure," US patent 2,981,877, Patent and Trademark Office, filed 30 July 1959, awarded 21 Apr. 1961.
29. R.N. Noyce, "Semiconductor Circuit Complex Having Isolation Means," US patent 3,150,299, Patent and Trademark Office, filed 11 Sept. 1959, awarded 22 Sept. 1964; "Semiconductor Circuit Complexes," US patent no. 3,117,260, Patent and Trademark Office, filed 11 Sept. 1959, awarded 7 June 1964.
30. K. Lehovec, "Multiple Semiconductor Assembly," US patent 3,029,366, Patent and Trademark Office, filed 22 Apr. 1959, awarded 10 Apr. 1962.
31. Jay Last, Fairchild Micrologic Integrated Circuits Oral History Panel, Computer History Museum (CHM), 6 Oct. 2007, p. 6.
32. Fairchild Semiconductor, Leadwire, Sept. 1959, p. 1; copied in Lécuyer and Brock, Makers of the Microchip, p. 169.
33. Fairchild Camera and Instrument Company, Annual Report, 1959, p 7.
34. Last, Fairchild Micrologic Oral History Panel, p. 6.
35. L. Berlin, "Four Stories from the Life of Robert Noyce" CORE, Spring–Summer 2007, p. 21.
36. Norman Fairchild Micrologic Oral History Panel, p. 5.
37. L. Kattner telephone conversation with D.A. Laws, 2008.
38. Last, Fairchild Micrologic Oral History Panel, p. 6.
39. Last, Fairchild Micrologic Oral History Panel, p. 6.
40. J. Last Fairchild patent notebook, 13 Feb. 1960, pp. 58–59; copied in Lécuyer and Brock, Makers of the Microchip, pp. 191–92. See also J.T. Last, "Solid-State Circuitry Having Discrete Regions of Semi-Conductor Material Isolated by an Insulating Material," US patent 3,158,788, Patent and Trademark Office, filed 15 Aug. 1960, awarded 24 Nov. 1964; and "Method of Making Solid-State Circuitry," US patent 3,313,013, Patent and Trademark Office, filed 15 Aug. 1960, awarded 11 Apr. 1967.
41. G.E. Moore, "Summary of Projected R&D Program for 1960," memorandum to R. Hodgson 5 Nov. 1959; copied in Lé, cuyer and Brock, Makers of the Microchip, pp. 172–176, quote on p. 173.
42. Fairchild Semiconductor, Leadwire, Feb. 1960, p. 5.
43. R. Norman, J. Last, and I. Haas, "Solid-State Micrologic Elements," Technical Articles and Papers, TP-7 Feb. 1960; Fairchild Semiconductor Collection, Computer History Museum. An unusual note at the end of the paper, "The complete backing by the Company made unnecessary the use of tax money in this development," highlights Fairchild Semiconductor's disdain for government funding of its R&D activities.
44. R. Norman, "Status Report on Micrologic Elements," Technical Articles and Papers, TP-10, June 1960.
45. D. Farina, J. Nall, and R. Anderson, "Application of Micrologic Elements," Technical Articles and Papers, TP-11, Oct. 1960.
46. J.A. Hoerni, "Planar Silicon Transistors and Diodes," Technical Articles and Papers, TP-14, Oct. 1960.
47. I. Haas email communication to D.A. Laws24 Dec. 2007.
48. Kattner Fairchild Micrologic Oral History Panel, p. 10.
49. Last Fairchild Micrologic Oral History Panel, p. 14.
50. "L.E. Kattner Old (Original)," Fairchild engineering notebook pages, 26 May 1960.
51. On reviewing a draft of this paper, R. Norman disputes the 26 May 1960 date for the first working flip-flop, as recorded in L. Kattner's notebook. Norman says that a working flip-flop was produced prior to his presentation of the paper at the Solid-State Circuits Conference on 12 Feb. 1960. Norman recalls that Noyce made his permission for this presentation conditional on the successful testing of Micrologic devices. Norman's explanation for the discrepancy with Kattner's entry is that working flip-flops were actually fabricated earlier by C. Plough on a separate pilot line. There is no current documentary record of such work.
52. I. Haas Fairchild Semiconductor patent notebook, especially the p. 127 entry dated 31 Aug. 1960.
53. Haas email to Laws, 24 Dec. 2007
54. Kattner Fairchild Micrologic Oral History Panel, p. 10.
55. I. Haas Fairchild Semiconductor patent notebook, "Preliminary results on diffused flip-flops," 13 Sept. 1960, pp. 128–129, quote on p. 129 (emphasis and quote marks in original); copied in Lécuyer and Brock, Makers of the Microchip, pp. 201–202.
56. L. Kattner Fairchild engineering notebook, "Micrologic Electrical Isolation," undated entry, preceding an entry dated 26 Sept. 1960.
57. L. Kattner and J. Nall, separate entries in Fairchild Semiconductor Corporation Research and Development Department Progress Report, 1 Oct. 1960; copied in Lécuyer and Brock, Makers of the Microchip, pp. 224–227.
58. Kattner Fairchild Micrologic Oral History Panel, p. 10.
59. Norman Fairchild Micrologic Oral History Panel, p. 28.
60. R. Norman interview by D.A. Laws Computer History Museum, 7 May 2009, p. 14–15; http://www.computerhistory.org/collections/ accession102702133.
61. J. Nall, Fairchild Camera and Instrument Corporation, Research and Development Division Progress Report, 1 Dec. 1960, Stanford Univ. Silicon Valley Archives.
62. Electronic Design,9 Nov. 1960, p. 80.
63. V. Grinich and G. Moore, Fairchild Camera and Instrument Corporation, Research and Development Division Progress Report, 8 Feb. 1961; Stanford Univ. Silicon Valley Archives.
64. "Announcing the First of a Family," Fairchild Semiconductor μL Micrologic, brochure, 1961.
65. "In Tiny Devices, A Revolution," Life,10 Mar. 1961, pp. 62–63.
66. M. Phelps Fairchild Bipolar Digital Products Panel Discussion, transcription of Computer History Museum session, 5 Oct. 2007, p. 3; http://www.computerhistory.org/collections/ accession102658280.
67. R. Anderson email correspondence with coauthor D.A. Laws31 Mar. 2011.
68. "Testing of Micrologic Elements," Proc. Western Joint Computer Conf., May 1961, pp. 75–86.
69. Organization of Magic II Advanced Computer for Airborne Guidance Systems, AC Spark Plug Division brochure, 21 Nov. 1963, p. 1; http://www.bitsavers.org/pdf/ac_delco/magic Organization_Of_MAGIC_II_Nov63.pdf.
70. E.C. Hall, Journey to the Moon: The History of the Apollo Guidance Computer, Am. Inst. of Aeronautics and Astronautics, 1996.
71. R. Norman, "Solid State Switching and Memory Apparatus" US patent 3562721, Patent and Trademark Office, filed 5 Mar. 1963, issued 9 Feb. 1971.
72. Phelps Fairchild Bipolar Panel, p. 3.
73. R.F. Graham, "Micrologic Status Report," Fairchild Semiconductor memorandum to "All Field Sales," 1 Dec. 1961; copied in Lécuyer and Brock, Makers of the Microchip, p. 230.
74. J. (Phil) Ferguson interview by D.A. Laws29 Apr. 2010 (transcript in process).
75. The first published Bell Labs paper on epitxay was by H.C. Theuerer et al., "Epitaxial Diffused Transistors," Proc. IRE, vol. 48, no. 9, 1960, pp. 1642–1643. Moore mentions the importance of epitaxy in "The Role of Fairchild," p. 60. See also Fairchild Epitaxial Micrologic, a promotional brochure published by Fairchild Semiconductor, 1963, Fairchild Semiconductor Collection, Computer History Museum.
76. Ferguson interview by Laws.
77. Sporck quoted by Ferguson, interview by Laws.
78. Blume quoted by J. Hulme, "Fairchild Bipolar Panel," p. 9.
79. Last Fairchild Oral History Panel, p.22.
80. A similar point is made by S.W. Leslie in "Blue Collar Science: Bringing the Transistor to Life in the Lehigh Valley," Historical Studies in the Physical and Biological Sciences, vol. 32, no. 1, 2001, pp. 71–114. Under the leadership of its President Mervin Kelly, Bell Labs deliberately established units at AT&T's advanced manufacturing plant in Allentown, Pennsylvania, trying to close gaps between its Murray Hill research teams and manufacturing development at Western Electric. This approach succeeded to some extent, but Bell Labs still remained wedded to the linear model.
81. Moore quoted in Riordan "The Silicon Dioxide Solution," p. 51.
6 ms
(Ver 2.0)

Marketing Automation Platform Marketing Automation Tool