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| Hanjoon Kim, Yonggon Kim, John Kim, "Clumsy Flow Control for High-Throughput Bufferless On-Chip Networks," IEEE Computer Architecture Letters, vol. 99, no. 2, pp. 1, , 5555. | |||
| BibTex | x | ||
| @article{ 10.1109/L-CA.2012.22, author = {Hanjoon Kim and Yonggon Kim and John Kim}, title = {Clumsy Flow Control for High-Throughput Bufferless On-Chip Networks}, journal ={IEEE Computer Architecture Letters}, volume = {99}, number = {2}, issn = {1556-6056}, year = {5555}, pages = {1}, doi = {http://doi.ieeecomputersociety.org/10.1109/L-CA.2012.22}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
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| TY - CONF JO - IEEE Computer Architecture Letters TI - Clumsy Flow Control for High-Throughput Bufferless On-Chip Networks IS - 2 SN - 1556-6056 SP EP EPD - 1 A1 - Hanjoon Kim, A1 - Yonggon Kim, A1 - John Kim, PY - 5555 KW - On-chip interconnection networks KW - Computer Systems Organization KW - Processor Architectures KW - Multiple Data Stream Architectures (Multiprocessors) KW - Interconnection architectures KW - Computer Systems Organization KW - Processor Architectures KW - Parallel Architectures VL - 99 JA - IEEE Computer Architecture Letters ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/L-CA.2012.22
Bufferless on-chip networks are an alternative type of on-chip network organization that can improve the cost-efficiency of an on-chip network by removing router input buffers. However, bufferless on-chip network performance degrades at high load because of the increased network contention and large number of deflected packets. The energy benefit of bufferless network is also reduced because of the increased deflection. In this work, we propose a novel flow control for bufferless on-chip networks in high-throughput manycore accelerator architectures to reduce the impact of deflection routing. By using a clumsy flow control (CFC), instead of the per-hop flow control that is commonly used in buffered on-chip networks, we are able to reduce the amount of deflection by up to 92% on high-throughput workloads. As a result, on average, CFC can approximately match the performance of a baseline buffered router while reducing the energy consumption by approximately 39%.
Index Terms:
On-chip interconnection networks,Computer Systems Organization,Processor Architectures,Multiple Data Stream Architectures (Multiprocessors),Interconnection architectures,Computer Systems Organization,Processor Architectures,Parallel Architectures
Citation:
Hanjoon Kim, Yonggon Kim, John Kim, "Clumsy Flow Control for High-Throughput Bufferless On-Chip Networks," IEEE Computer Architecture Letters, 16 Aug. 2012. IEEE computer Society Digital Library. IEEE Computer Society, <http://doi.ieeecomputersociety.org/10.1109/L-CA.2012.22>
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