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Issue No.01 - January-June (2011 vol.10)
pp: 24-27
Xiaoqun Wang , Harbin Institute of Technology, Harbin
Zhenzhou Ji , Harbin Institute of Technology, Harbin
Chen Fu , Harbin Institute of Technology, Harbin
Mingzeng Hu , Harbin Institute of Technology, Harbin
ABSTRACT
Hardware Transactional Memory (HTM) is a promising Transactional Memory (TM) implementation because of its strong atomicity and high performance. Unfortunately, most contention management approaches in HTMs are dedicated to specific transaction conflict scenarios and it is hard to choose a universal strategy for different workloads. In addition, HTM performance degrades sharply when there are severe transaction conflicts. In this paper, we present a Global Contention Management Scheme (GCMS) to resolve severe transaction conflicts in HTMs. Our scheme depends on a Deadlock and Livelock Detection Mechanism (DLDM) and a Global Contention Manager (GCM) to resolve severe transaction conflicts. This scheme is orthogonal to the rest of the contention management policies. We have incorporated GCMS into different HTMs and compared the performance of the enhanced systems with that of the original HTMs with the STAMP benchmark suite. The results demonstrate that the performance of the enhanced HTMs is improved.
INDEX TERMS
Concurrent Programming, Multi-core/single-chip multiprocessors
CITATION
Xiaoqun Wang, Zhenzhou Ji, Chen Fu, Mingzeng Hu, "GCMS: A Global Contention Management Scheme in Hardware Transactional Memory", IEEE Computer Architecture Letters, vol.10, no. 1, pp. 24-27, January-June 2011, doi:10.1109/L-CA.2011.6
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