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Issue No.01 - January-June (2009 vol.8)
pp: 25-28
Zvika Guz , Technion, IIT, Technion city, Haifa
Evgeny Bolotin , Intel, Haifa
Idit Keidar , Technion, IIT, Haifa
Avinoam Kolodny , Technion, IIT, Haifa
Avi Mendelson , Technion, IIT Microsoft Corporation, Haifa Haifa
Uri C. Weiser , Technion, IIT Commex-Technologies, Haifa Tel Aviv
ABSTRACT
We study the tradeoffs between Many-Core machines like Intel’s Larrabee and Many-Thread machines like Nvidia and AMD GPGPUs. We define a unified model describing a superposition of the two architectures, and use it to identify operation zones for which each machine is more suitable. Moreover, we identify an intermediate zone in which both machines deliver inferior performance. We study the shape of this “performance valley” and provide insights on how it can be avoided.
INDEX TERMS
Multi-core/single-chip multiprocessors, Parallel Architectures, Processor Architectures, Computer Systems, Processor Architectures
CITATION
Zvika Guz, Evgeny Bolotin, Idit Keidar, Avinoam Kolodny, Avi Mendelson, Uri C. Weiser, "Many-Core vs. Many-Thread Machines: Stay Away From the Valley", IEEE Computer Architecture Letters, vol.8, no. 1, pp. 25-28, January-June 2009, doi:10.1109/L-CA.2009.4
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