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CPU Accounting in CMP Processors
January-June 2009 (vol. 8 no. 1)
pp. 17-20
| ASCII Text | x | ||
| Carlos Luque, Miquel Moreto, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Mateo Valero, "CPU Accounting in CMP Processors," IEEE Computer Architecture Letters, vol. 8, no. 1, pp. 17-20, January-June, 2009. | |||
| BibTex | x | ||
| @article{ 10.1109/L-CA.2009.3, author = {Carlos Luque and Miquel Moreto and Francisco J. Cazorla and Roberto Gioiosa and Alper Buyuktosunoglu and Mateo Valero}, title = {CPU Accounting in CMP Processors}, journal ={IEEE Computer Architecture Letters}, volume = {8}, number = {1}, issn = {}, year = {2009}, pages = {17-20}, doi = {http://doi.ieeecomputersociety.org/10.1109/L-CA.2009.3}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - IEEE Computer Architecture Letters TI - CPU Accounting in CMP Processors IS - 1 SN - SP17 EP20 EPD - 17-20 A1 - Carlos Luque, A1 - Miquel Moreto, A1 - Francisco J. Cazorla, A1 - Roberto Gioiosa, A1 - Alper Buyuktosunoglu, A1 - Mateo Valero, PY - 2009 KW - Hardware KW - Hardware/software interfaces KW - Multi-core/single-chip multiprocessors KW - General VL - 8 JA - IEEE Computer Architecture Letters ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/L-CA.2009.3
Chip-Multiprocessor (CMP) architectures introduce complexities when accounting CPU utilization to processes because the progress done by a process during an interval of time highly depends on the activity of the other processes it is co-scheduled with. In this paper, we identify how an inaccurate measurement of the CPU utilization affects several key aspects of the system like the process scheduling or the charging mechanism in data centers. We propose a new hardware accounting mechanism to improve the accuracy when measuring the CPU utilization in chip multiprocessors and compare it with the previous accounting mechanisms. Our results show that currently known mechanisms could lead to a 12% average error when it comes to CPU utilization accounting. Our proposal reduces this error to less than 1% in a modeled 4-core processor system.
Index Terms:
Hardware, Hardware/software interfaces, Multi-core/single-chip multiprocessors, General
Citation:
Carlos Luque, Miquel Moreto, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Mateo Valero, "CPU Accounting in CMP Processors," IEEE Computer Architecture Letters, vol. 8, no. 1, pp. 17-20, Jan.-June 2009, doi:10.1109/L-CA.2009.3
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