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| Kelly A. Shaw, William J. Dally, "Migration in Single Chip Multiprocessors," IEEE Computer Architecture Letters, vol. 1, no. 1, pp. , January-December, 2002. | |||
| BibTex | x | ||
| @article{ 10.1109/L-CA.2002.7, author = {Kelly A. Shaw and William J. Dally}, title = {Migration in Single Chip Multiprocessors}, journal ={IEEE Computer Architecture Letters}, volume = {1}, number = {1}, issn = {1556-6056}, year = {2002}, doi = {http://doi.ieeecomputersociety.org/10.1109/L-CA.2002.7}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - IEEE Computer Architecture Letters TI - Migration in Single Chip Multiprocessors IS - 1 SN - 1556-6056 SP EP EPD - A1 - Kelly A. Shaw, A1 - William J. Dally, PY - 2002 VL - 1 JA - IEEE Computer Architecture Letters ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/L-CA.2002.7
Global communication costs in future single-chipmultiprocessors will increase linearly with distance. In this paper,we revisit the issues of locality and load balance in order totake advantage of these new costs. We present a technique whichsimultaneously migrates data and threads based on vectors specifyinglocality and resource usage. This technique improves performanceon applications with distinguishable locality and imbalancedresource usage. 64% of the ideal reduction in execution timewas achieved on an application with these traits while no improvementwas obtained on a balanced application with little locality.
Citation:
Kelly A. Shaw, William J. Dally, "Migration in Single Chip Multiprocessors," IEEE Computer Architecture Letters, vol. 1, no. 1, Jan.-Dec. 2002, doi:10.1109/L-CA.2002.7
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