Issue No.01 - January-December (2002 vol.1)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/L-CA.2002.10
Power consumption is a key issue in highperformanceinterconnection network design. Communicationlinks, already a aignificant consumer of power now,will take up an ever larger portion of the power budgetas demand for network bandwidth increases. In this paper,we motivate the use of dynamic voltage scaling (DVS)for links, where the frequency and voltage of links are dynamicallyadjusted to minimize power consumption. Wepropose a history-based DYS algorithm that jjlidiciously adjustsDVS poIicies based on past link utilization. Despitevery conservative assumptions about DVS link characteristics,our approach realizes up to 4.5X power savings (3.2Xaverage), with just an average 27.4% Iatency increase and2.5% throughput reduction. To the best of our knowledge,this is the first study that targets dynamic power optimizationof interconnection networks.
Dynamic voltage scaling, interconnection network, power optimization.
Li Shang, Li-Shiuan Peh, Niraj K. Jha, "Power-efficient Interconnection Networks: Dynamic Voltage Scaling with Links", IEEE Computer Architecture Letters, vol.1, no. 1, pp. 6, January-December 2002, doi:10.1109/L-CA.2002.10