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Exploiting Fixed Programs in Embedded Systems: A Loop Cache Example
January-December 2002 (vol. 1 no. 1)
pp.
| ASCII Text | x | ||
| Ann Gordon-Ross, Susan Cotterell, Frank Vahid, "Exploiting Fixed Programs in Embedded Systems: A Loop Cache Example," IEEE Computer Architecture Letters, vol. 1, no. 1, pp. , January-December, 2002. | |||
| BibTex | x | ||
| @article{ 10.1109/L-CA.2002.4, author = {Ann Gordon-Ross and Susan Cotterell and Frank Vahid}, title = {Exploiting Fixed Programs in Embedded Systems: A Loop Cache Example}, journal ={IEEE Computer Architecture Letters}, volume = {1}, number = {1}, issn = {1556-6056}, year = {2002}, doi = {http://doi.ieeecomputersociety.org/10.1109/L-CA.2002.4}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - IEEE Computer Architecture Letters TI - Exploiting Fixed Programs in Embedded Systems: A Loop Cache Example IS - 1 SN - 1556-6056 SP EP EPD - A1 - Ann Gordon-Ross, A1 - Susan Cotterell, A1 - Frank Vahid, PY - 2002 KW - Loop cache KW - architecture tuning KW - low power KW - fixed program KW - embedded systems. VL - 1 JA - IEEE Computer Architecture Letters ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/L-CA.2002.4
Embedded systems commonly execute oneprogram for their lifetime. Designing embedded systemarchitectures with configurable components, such thatthose components can be tuned to that one program basedon a program pre-analysis, can yield significant powerand performance benefits. We illustrate such benefits bydesigning a loop cache specifically with tuning in mind.Our results show a 70% reduction in instruction memoryaccess, for MIPS and 8051 processors ? representingtwice the reduction from a regular loop cache, translatingto good power savings.
Index Terms:
Loop cache, architecture tuning, low power,fixed program, embedded systems.
Citation:
Ann Gordon-Ross, Susan Cotterell, Frank Vahid, "Exploiting Fixed Programs in Embedded Systems: A Loop Cache Example," IEEE Computer Architecture Letters, vol. 1, no. 1, Jan.-Dec. 2002, doi:10.1109/L-CA.2002.4
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